Digital circuitry involving microprocessor or other programmed apparatus based circuitry generally includes two different types of semiconductor memory devices, viz., random access memory (RAM) devices which store data that are changeable during the normal course of information processing and read only memory (ROM) devices which contain programing and data that are constant during processing. Within these general classifications of memory devices are included non-volatile RAMs which retain data stored therein upon removal of electrical power from the devices, and programmable ROMs which contain programming and data that can be electrically or electrooptically altered.
Physical faults, which can occur in any part of the chips forming the memory devices as well as on printed wiring boards connecting the chips into systems, depend on such factors as component density, circuit layout and method of manufacture. Test procedures necessary to detect these faults are classified into three classes, DC parametric testing, AC parametric testing and functional testing. For a detailed description of each classification as it relates to testing of random access memories, attention is directed toward U.S. Patent Application Ser. No. 708,749 of Jacobson, filed on Mar. 4, 1985, assigned to the assignee of this invention and incorporated herein by reference.
A complete functional verification of the correct function of a read only memory (ROM) circuit in a system involves checking that each of the N words of the ROM contains the data originally programmed into it, and that the order in which cells are accessed has no effect on the values read. Complete verification is infeasible, requiring 2.sup.N accesses to test an N word ROM. Even sequentially verifying that each locations contains the data programmed into it may not be possible if the original data are not available or the ROM is large.
Functional testing of a ROM is considered to be more difficult to implement than functional testing of a RAM because the data stored in a ROM is predetermined, i.e., patterns of data that are truly random or otherwise suited well for testing the memory are not able to be written therein during testing or the prestored data may contain "pathological" data peculiar to the use to which the ROM is put and which conceals a fault.
In current practice, to test the function of an ROM, data stored therein are compressed into either a checksum or a cyclic redundancy check (CRC) word. This "signature" of the ROM data is compared against a similar signature calculated from the data originally programmed into the ROM. If the signatures are equal, the data are presumed identical.
The ROM signature is not completely effective in encoding the ROM data. Although two ROMs which differ in a single bit position will always have different checksums or CRC signatures, the probability that two ROMs which differ in many positions will have the same signature is at least 2.sup.-b, wherein b is the width of the signature in bits. That value is 1/256 for most checksums, and 1/65536 for CRC16 signatures. This is significant because a fault in ROM accessing circuitry affects data in many locations, increasing the chance that the signature of the faulty ROM circuit will match the original signature. Even if the ROM signature differs from the signature of the original data, it provides a pass or fail indication but no diagnostic information indicating the type or source of the fault. Thus, diagnosing faults in ROM circuits or other memory circuits such as non-volatile RAMs upon restoration of power having data prestored therein that cannot be replaced with test data or otherwise altered, has not been effectively carried out; instead, each wire leading to a suspect device has had to be examined manually for shorts or opens.